The default instruction set architecture (ISA) for SIMD-enabled functions is inefficient for your host processor because it could result in extra memory operations between registers. To fix: Add one of the following to tell the compiler to generate an extended set of vector functions.
| Windows* OS | Linux* OS |
|---|---|
| processor(cpuid) to #pragma omp declare simd | processor(cpuid) to #pragma omp declare simd |
| processor(cpuid) to _declspec(vector()) | processor(cpuid) to _attribute_(vector()) |
| /Qvecabi:cmdtarget Note: Vector variants are created for targets specified for targets specified by compiler options /Qx or /Qax | -vecabi=cmdtarget Note: Vector variants are created for targets specified for targets specified by compiler options -x or -ax |