##########################################################################
# SEP Uncore Event File: UNC_SOC_Graphics_BW.txt
# Copyright(c)2014 Intel Corporation. All rights reserved.
# File: PUBLIC
# Events: PUBLIC
# Created: Tue Sep 23 12:49:31 2014
# Target: CHV-A0
# Revision: 2.0-4.0.0.0
##########################################################################

# EVENT INFORMATION

# GROUP_ID         : 25370
# GROUP_NAME       : UNC_SOC_Graphics_BW
# GROUP_DESC       : Counts graphic controller bandwidth events. Determine bandwidth between the graphic controller and memory by multiplying event count by the request size (32 or 64 bytes).
# EVENT_ID         : 25390
# EVENT_NAME       : GFX_ReadPartial
# EVENT_DESC       : Counts graphics controller read transactions with partial sized data requests.
# EVENT_COUNTER    : 0
# EVENT_ID         : 25320
# EVENT_NAME       : GFX_Read32B
# EVENT_DESC       : Counts memory read requests of size 32 bytes from the graphic controller.
# EVENT_COUNTER    : 1
# EVENT_ID         : 25321
# EVENT_NAME       : GFX_Read64B
# EVENT_DESC       : Counts memory read requests of size 64 bytes from the graphic controller.
# EVENT_COUNTER    : 2
# EVENT_ID         : 25391
# EVENT_NAME       : GFX_WritePartial
# EVENT_DESC       : Counts graphics controller write transactions with partial sized data requests.
# EVENT_COUNTER    : 3
# EVENT_ID         : 25322
# EVENT_NAME       : GFX_Write32B
# EVENT_DESC       : Counts memory write requests of size 32 bytes from the graphic controller.
# EVENT_COUNTER    : 4
# EVENT_ID         : 25323
# EVENT_NAME       : GFX_Write64B
# EVENT_DESC       : Counts memory write requests of size 64 bytes from the graphic controller.
# EVENT_COUNTER    : 5
# CLOCK_COUNTER    : 6

# All SOC Programing
# HEADER	CFGTYPE	BUS_NUMBER	DEVICE_NUMBER	FUNC_NUMBER	REG_SIZE	OPERATION	BARNAME	OFFSET	VALUE	MASK	PORT_ID	OP_CODE
#<CFGTYPE-MMIO/PCICFG>	<BUS_NUMBER>	<DEVICE_NUMBER>	<FUNC_NUMBER>	<REGISTER_SIZE>	<READ/WRITE/RMW operation>	<BARNAME>	<OFFSET>	<VALUE>	<MASK>	<PORT_ID>	<OP_CODE>

# SOC CONFIGURATION

CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x00006AAB	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x00000000	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00006AAB	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x00000000	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x00010000	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000000	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x20000000	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x00020000	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x20000000	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000084	0x00000C0D	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x00030021	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000C0D	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000080	0x00000001	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x00040020	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000001	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000088	0x00000D0E	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x00050022	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000D0E	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000008C	0x00000E0F	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x00060023	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000E0F	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000090	0x00000F10	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x00070024	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000F10	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000094	0x00001011	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x00080025	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00001011	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x000000A8	0x04802804	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x0009002A	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x04802804	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x000000AC	0x0000881A	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x000A002B	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x0000881A	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x000000B0	0x00000000	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x000B002C	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000000	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000384	0x00000001	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x000C00E1	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000001	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000380	0x00000001	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x000D00E0	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000001	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000388	0x00000102	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x000E00E2	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000102	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000038C	0x00000203	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x000F00E3	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000203	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000390	0x00000304	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x001000E4	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000304	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000394	0x00000405	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x001100E5	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000405	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00004B84	0x00000607	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x001212E1	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000607	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00004B80	0x00000001	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x001312E0	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000001	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00004B88	0x00000708	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x001412E2	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000708	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00004B8C	0x00000809	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x001512E3	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000809	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00004B90	0x0000090A	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x001612E4	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x0000090A	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00004B94	0x00000A0B	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x001712E5	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000A0B	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00004984	0x00000C01	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x00181261	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000C01	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00004980	0x00000001	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x00191260	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000001	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00004988	0x00000C02	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x001A1262	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000C02	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000498C	0x00000C03	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x001B1263	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000C03	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00004990	0x00000C04	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x001C1264	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000C04	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00004994	0x00000C05	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x001D1265	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000C05	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x000049A8	0x00000006	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x001E126A	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000006	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x000049A4	0x00000001	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x001F1269	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000001	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x000049AC	0x0000000A	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x0020126B	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x0000000A	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x000049B0	0x00000008	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x0021126C	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000008	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x000049B4	0x00000009	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x0022126D	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000009	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x000049B8	0x0000000B	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x0023126E	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x0000000B	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x00000000	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x00240000	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000004	0x00000000	0xFFFFFFFF	24	1
# SOC replay entries
CFG	0	0	0	32	WRITE	SOCPCI	0x00000008	0x00000000	0xFFFFFFFF	24	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000008	0x00012400	0xFFFFFFFF	24	1

# COUNTER CONFIGURATION

CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x00008000	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000008	0x00FC0302	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000000C	0x00F90602	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000010	0x00F50A02	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000014	0x10EE1102	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000018	0x10EB1402	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000001C	0x10E71802	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000020	0x00000003	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000030	0x10000000	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000040	0x10000000	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000050	0x10000000	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000060	0x10000000	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000070	0x10000000	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000080	0x10000000	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000090	0x00000000	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000002C	0x00000120	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000003C	0x00000121	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000004C	0x00000122	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000005C	0x00000123	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000006C	0x00000124	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000007C	0x00000125	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000008C	0x00002126	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000034	0x00000000	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000044	0x00000000	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000054	0x00000000	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000064	0x00000000	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000074	0x00000000	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000084	0x00000000	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000094	0x00000000	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000028	0x02010120	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000038	0x02110121	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000048	0x02110122	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000058	0x02110123	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000068	0x02110124	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000078	0x02110125	0xFFFFFFFF	23	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000088	0x00110000	0xFFFFFFFF	23	1
