##########################################################################
# SEP Uncore Event File: UNC_SOC_Snoops.txt
# Copyright(c)2016 Intel Corporation. All rights reserved.
# File: PUBLIC
# Events: PUBLIC
# Created: Thu Jun 23 12:48:09 2016
# Target: DNV-A0
# Revision: 1.0-4.6.1.0
##########################################################################

# EVENT INFORMATION

# GROUP_ID         : 9484785
# GROUP_NAME       : UNC_SOC_Snoops
# GROUP_DESC       : Counts the number of snoops from uncore to processor modules 0 to 7.
# EVENT_ID         : 5897359
# EVENT_NAME       : Mod0_1_Snoop_Replies
# EVENT_DESC       : Counts the number of snoop replies received from processor modules 0 and 1.
# EVENT_COUNTER    : 0
# EVENT_ID         : 5897360
# EVENT_NAME       : Mod0_1_Snoop_Reqs
# EVENT_DESC       : Counts the number of snoop requests sent to processor modules 0 and 1.
# EVENT_COUNTER    : 1
# EVENT_ID         : 5897361
# EVENT_NAME       : Mod2_3_Snoop_Replies
# EVENT_DESC       : Counts the number of snoop replies received from processor modules 2 and 3.
# EVENT_COUNTER    : 2
# EVENT_ID         : 5897362
# EVENT_NAME       : Mod2_3_Snoop_Reqs
# EVENT_DESC       : Counts the number of snoop requests sent to processor modules 2 and 3.
# EVENT_COUNTER    : 3
# EVENT_ID         : 8286377
# EVENT_NAME       : Mod4_5_Snoop_Replies
# EVENT_DESC       : Counts the number of snoop replies received from processor modules 4 and 5.
# EVENT_COUNTER    : 4
# EVENT_ID         : 8286378
# EVENT_NAME       : Mod4_5_Snoop_Reqs
# EVENT_DESC       : Counts the number of snoop requests sent to processor modules 4 and 5.
# EVENT_COUNTER    : 5
# EVENT_ID         : 8286379
# EVENT_NAME       : Mod6_7_Snoop_Replies
# EVENT_DESC       : Counts the number of snoop replies received from processor modules 6 and 7.
# EVENT_COUNTER    : 6
# EVENT_ID         : 8286380
# EVENT_NAME       : Mod6_7_Snoop_Reqs
# EVENT_DESC       : Counts the number of snoop requests sent to processor modules 6 and 7.
# EVENT_COUNTER    : 7
# CLOCK_COUNTER    : 8

# HEADER	CFGTYPE	BUS_NUMBER	DEVICE_NUMBER	FUNC_NUMBER	REG_SIZE	OPERATION	BARNAME	OFFSET	VALUE	MASK
#<CFGTYPE-MMIO/PCICFG>	<BUS_NUMBER>	<DEVICE_NUMBER>	<FUNC_NUMBER>	<REGISTER_SIZE>	<READ/WRITE/RMW operation>	<BARNAME>	<OFFSET>	<VALUE>	<MASK>

# VISA CONFIGURATION

MEM	0	0	2	32	WRITE	NPKBAR	0x00000090	0x00000001	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00000080	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00020080	0x00000001	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00020084	0x00000405	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00020088	0x00000506	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000200b4	0x00402000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000200b8	0x02800809	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000200bc	0x00002c03	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00020180	0x00000001	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00020184	0x00003637	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00020188	0x00003738	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x0002a300	0x00000001	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x0002a304	0x00000002	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x0002a308	0x00000001	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000000e0	0x01000000	0xFFFFFFFF

# CHAP CONFIGURATION

MEM	0	0	2	32	WRITE	NPKBAR	0x00005000	0x00008000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005148	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005008	0x00000043	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x0000500c	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005010	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005014	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005018	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x0000501c	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005020	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005024	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005028	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x0000502c	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005030	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005034	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005038	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x0000503c	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005040	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005044	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005054	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005050	0x10000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x0000504c	0x00000100	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005048	0x00150000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005064	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005060	0x10000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x0000505c	0x00000101	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005058	0x00150000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005074	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005070	0x10000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x0000506c	0x00000102	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005068	0x00150000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005084	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005080	0x10000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x0000507c	0x00000103	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005078	0x00150000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005094	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005090	0x10000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x0000508c	0x00000104	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005088	0x00150000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050a4	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050a0	0x10000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x0000509c	0x00000105	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005098	0x00150000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050b4	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050b0	0x10000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050ac	0x00000106	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050a8	0x00150000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050c4	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050c0	0x10000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050bc	0x00000107	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050b8	0x00150000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050d4	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050d0	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050cc	0x00000120	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050c8	0x00150000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050e4	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050e0	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050dc	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050d8	0x00100000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050f4	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050f0	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050ec	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050e8	0x00100000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005104	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005100	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050fc	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x000050f8	0x00100000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005114	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005110	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x0000510c	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005108	0x00100000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005124	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005120	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x0000511c	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005118	0x00100000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005134	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005130	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x0000512c	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005128	0x00100000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005144	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005140	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x0000513c	0x00000000	0xFFFFFFFF
MEM	0	0	2	32	WRITE	NPKBAR	0x00005138	0x00100000	0xFFFFFFFF

