# Performance Monitoring Events for 5th Generation Intel(R) Xeon(R) Processor Scalable Family - V1.10
# 07/18/2024 EVENT_STATUS Legend: None = 0x00, Deprecated = 0x01, Template = 0x02
# Copyright (c) 2001 - 2024 Intel Corporation. All rights reserved.
UNIT	CODE	UMASK	PORT_MASK	FC_MASK	UMASK_EXT	NAME	DESCRIPTION	COUNTER	FILTER	INTERNAL	FILTER_VALUE	EVENT_STATUS	COUNTER_TYPE
IIO	0x00	0x00	0x00	0x00	0x00000000	UNC_IIO_CLOCKTICKS_FREERUN	Free running counter that increments for IIO clocktick	0	na	0	0	0x00	FREERUN
IIO	0x01	0x00	0x0000	0x00	0x00000000	UNC_IIO_CLOCKTICKS	IIO Clockticks	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x83	0x01	0x0001	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0	Write request of 4 bytes made by IIO Part0 to Memory	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x01	0x0002	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1	Write request of 4 bytes made by IIO Part1 to Memory	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x01	0x0004	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2	Write request of 4 bytes made by IIO Part2 to Memory	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x01	0x0008	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3	Write request of 4 bytes made by IIO Part3 to Memory	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x01	0x0010	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4	Data requested of the CPU : Card writing to DRAM	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x01	0x0020	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5	Data requested of the CPU : Card writing to DRAM	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x01	0x0040	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6	Data requested of the CPU : Card writing to DRAM	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x01	0x0080	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7	Data requested of the CPU : Card writing to DRAM	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x01	0x00ff	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.ALL_PARTS	Write request of 4 bytes made by IIO Part0-7 to Memory	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x04	0x0001	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0	Read request for 4 bytes made by IIO Part0 to Memory	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x04	0x0002	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1	Read request for 4 bytes made by IIO Part1 to Memory	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x04	0x0004	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2	Read request for 4 bytes made by IIO Part2 to Memory	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x04	0x0008	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3	Read request for 4 bytes made by IIO Part3 to Memory	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x04	0x0010	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4	Data requested of the CPU : Card reading from DRAM	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x04	0x0020	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5	Data requested of the CPU : Card reading from DRAM	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x04	0x0040	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6	Data requested of the CPU : Card reading from DRAM	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x04	0x0080	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7	Data requested of the CPU : Card reading from DRAM	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x04	0x00ff	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.ALL_PARTS	Read request for 4 bytes made by IIO Part0-7 to Memory	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x80	0x0001	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART0	Data requested of the CPU : CmpD - device sending completion to CPU request	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x80	0x0002	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART1	Data requested of the CPU : CmpD - device sending completion to CPU request	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x80	0x0004	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART2	Data requested of the CPU : CmpD - device sending completion to CPU request	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x80	0x0008	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART3	Data requested of the CPU : CmpD - device sending completion to CPU request	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x80	0x0010	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART4	Data requested of the CPU : CmpD - device sending completion to CPU request	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x80	0x0020	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART5	Data requested of the CPU : CmpD - device sending completion to CPU request	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x80	0x0040	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART6	Data requested of the CPU : CmpD - device sending completion to CPU request	0,1	na	0	0	0x00	PGMABLE
IIO	0x83	0x80	0x0080	0x07	0x00000000	UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART7	Data requested of the CPU : CmpD - device sending completion to CPU request	0,1	na	0	0	0x00	PGMABLE
IIO	0x84	0x01	0x0001	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0	Write request of up to a 64 byte transaction is made by IIO Part0 to Memory	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x01	0x0002	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1	Write request of up to a 64 byte transaction is made by IIO Part1 to Memory	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x01	0x0004	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2	Write request of up to a 64 byte transaction is made by IIO Part2 to Memory	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x01	0x0008	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3	Write request of up to a 64 byte transaction is made by IIO Part3 to Memory	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x01	0x0010	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4	Number Transactions requested of the CPU : Card writing to DRAM	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x01	0x0020	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5	Number Transactions requested of the CPU : Card writing to DRAM	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x01	0x0040	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6	Number Transactions requested of the CPU : Card writing to DRAM	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x01	0x0080	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7	Number Transactions requested of the CPU : Card writing to DRAM	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x04	0x0001	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0	Read request for up to a 64 byte transaction is made by IIO Part0 to Memory	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x04	0x0002	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1	Read request for up to a 64 byte transaction is  made by IIO Part1 to Memory	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x04	0x0004	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2	Read request for up to a 64 byte transaction is made by IIO Part2 to Memory	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x04	0x0008	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3	Read request for up to a 64 byte transaction is made by IIO Part3 to Memory	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x04	0x0010	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4	Number Transactions requested of the CPU : Card reading from DRAM	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x04	0x0020	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5	Number Transactions requested of the CPU : Card reading from DRAM	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x04	0x0040	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6	Number Transactions requested of the CPU : Card reading from DRAM	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x04	0x0080	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7	Number Transactions requested of the CPU : Card reading from DRAM	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x80	0x0001	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART0	Number Transactions requested of the CPU : CmpD - device sending completion to CPU request	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x80	0x0002	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART1	Number Transactions requested of the CPU : CmpD - device sending completion to CPU request	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x80	0x0004	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART2	Number Transactions requested of the CPU : CmpD - device sending completion to CPU request	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x80	0x0008	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART3	Number Transactions requested of the CPU : CmpD - device sending completion to CPU request	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x80	0x0010	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART4	Number Transactions requested of the CPU : CmpD - device sending completion to CPU request	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x80	0x0020	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART5	Number Transactions requested of the CPU : CmpD - device sending completion to CPU request	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x80	0x0040	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART6	Number Transactions requested of the CPU : CmpD - device sending completion to CPU request	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x84	0x80	0x0080	0x07	0x00000000	UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART7	Number Transactions requested of the CPU : CmpD - device sending completion to CPU request	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0x85	0x01	0x0FFF	0x07	0x00000000	UNC_IIO_NUM_REQ_OF_CPU.COMMIT.ALL	Number requests PCIe makes of the main die : All	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0xc0	0x01	0x0001	0x07	0x00000000	UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0	Write request of 4 bytes made to IIO Part0 by the CPU	2,3	na	0	0	0x00	PGMABLE
IIO	0xc0	0x01	0x0002	0x07	0x00000000	UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1	Write request of 4 bytes made to IIO Part1 by the CPU	2,3	na	0	0	0x00	PGMABLE
IIO	0xc0	0x01	0x0004	0x07	0x00000000	UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2	Write request of 4 bytes made to IIO Part2 by the CPU	2,3	na	0	0	0x00	PGMABLE
IIO	0xc0	0x01	0x0008	0x07	0x00000000	UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3	Write request of 4 bytes made to IIO Part3 by the CPU	2,3	na	0	0	0x00	PGMABLE
IIO	0xc0	0x01	0x0010	0x07	0x00000000	UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4	Data requested by the CPU : Core writing to Cards MMIO space	2,3	na	0	0	0x00	PGMABLE
IIO	0xc0	0x01	0x0020	0x07	0x00000000	UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5	Data requested by the CPU : Core writing to Cards MMIO space	2,3	na	0	0	0x00	PGMABLE
IIO	0xc0	0x01	0x0040	0x07	0x00000000	UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6	Data requested by the CPU : Core writing to Cards MMIO space	2,3	na	0	0	0x00	PGMABLE
IIO	0xc0	0x01	0x0080	0x07	0x00000000	UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7	Data requested by the CPU : Core writing to Cards MMIO space	2,3	na	0	0	0x00	PGMABLE
IIO	0xc0	0x04	0x0001	0x07	0x00070010	UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0	Read request for 4 bytes made by the CPU to IIO Part0	2,3	na	0	0	0x00	PGMABLE
IIO	0xc0	0x04	0x0002	0x07	0x00070020	UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1	Read request for 4 bytes made by the CPU to IIO Part1	2,3	na	0	0	0x00	PGMABLE
IIO	0xc0	0x04	0x0004	0x07	0x00070040	UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2	Read request for 4 bytes made by the CPU to IIO Part2	2,3	na	0	0	0x00	PGMABLE
IIO	0xc0	0x04	0x0008	0x07	0x00070080	UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3	Read request for 4 bytes made by the CPU to IIO Part3	2,3	na	0	0	0x00	PGMABLE
IIO	0xc0	0x04	0x0010	0x07	0x00070100	UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART4	Data requested by the CPU : Core reading from Cards MMIO space	2,3	na	0	0	0x00	PGMABLE
IIO	0xc0	0x04	0x0020	0x07	0x00070200	UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART5	Data requested by the CPU : Core reading from Cards MMIO space	2,3	na	0	0	0x00	PGMABLE
IIO	0xc0	0x04	0x0040	0x07	0x00070400	UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART6	Data requested by the CPU : Core reading from Cards MMIO space	2,3	na	0	0	0x00	PGMABLE
IIO	0xc0	0x04	0x0080	0x07	0x00070800	UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART7	Data requested by the CPU : Core reading from Cards MMIO space	2,3	na	0	0	0x00	PGMABLE
IIO	0xc1	0x01	0x0001	0x07	0x00000000	UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0	Write request of up to a 64 byte transaction is made to IIO Part0 by the CPU	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0xc1	0x01	0x0002	0x07	0x00000000	UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1	Write request of up to a 64 byte transaction is made to IIO Part1 by the CPU	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0xc1	0x01	0x0004	0x07	0x00000000	UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2	Write request of up to a 64 byte transaction is made to IIO Part2 by the CPU	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0xc1	0x01	0x0008	0x07	0x00000000	UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3	Write request of up to a 64 byte transaction is made to IIO Part3 by the CPU	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0xc1	0x01	0x0010	0x07	0x00000000	UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4	Number Transactions requested by the CPU : Core writing to Cards MMIO space	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0xc1	0x01	0x0020	0x07	0x00000000	UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5	Number Transactions requested by the CPU : Core writing to Cards MMIO space	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0xc1	0x01	0x0040	0x07	0x00000000	UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6	Number Transactions requested by the CPU : Core writing to Cards MMIO space	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0xc1	0x01	0x0080	0x07	0x00000000	UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7	Number Transactions requested by the CPU : Core writing to Cards MMIO space	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0xc1	0x04	0x0001	0x07	0x00000000	UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0	Read request for up to a 64 byte transaction is made by the CPU to IIO Part0	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0xc1	0x04	0x0002	0x07	0x00000000	UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1	Read request for up to a 64 byte transaction is made by the CPU to IIO Part1	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0xc1	0x04	0x0004	0x07	0x00000000	UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2	Read request for up to a 64 byte transaction is made by the CPU to IIO Part2	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0xc1	0x04	0x0008	0x07	0x00000000	UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3	Read request for up to a 64 byte transaction is made by the CPU to IIO Part3	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0xc1	0x04	0x0010	0x07	0x00000000	UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4	Number Transactions requested by the CPU : Core reading from Cards MMIO space	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0xc1	0x04	0x0020	0x07	0x00000000	UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5	Number Transactions requested by the CPU : Core reading from Cards MMIO space	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0xc1	0x04	0x0040	0x07	0x00000000	UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6	Number Transactions requested by the CPU : Core reading from Cards MMIO space	0,1,2,3	na	0	0	0x00	PGMABLE
IIO	0xc1	0x04	0x0080	0x07	0x00000000	UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7	Number Transactions requested by the CPU : Core reading from Cards MMIO space	0,1,2,3	na	0	0	0x00	PGMABLE
