# Performance Monitoring Events for 5th Generation Intel(R) Xeon(R) Processor Scalable Family - V1.10
# 07/18/2024 EVENT_STATUS Legend: None = 0x00, Deprecated = 0x01, Template = 0x02
# Copyright (c) 2001 - 2024 Intel Corporation. All rights reserved.
UNIT	CODE	UMASK	PORT_MASK	FC_MASK	UMASK_EXT	NAME	DESCRIPTION	COUNTER	FILTER	INTERNAL	FILTER_VALUE	EVENT_STATUS	COUNTER_TYPE
M2HBM	0x01	0x00	0x00	0x00	0x00000000	UNC_M2HBM_CLOCKTICKS	Cycles - at UCLK	0,1,2,3	na	0	0	0x00	PGMABLE
M2HBM	0x20	0x01	0x00	0x00	0x00000000	UNC_M2HBM_DIRECTORY_LOOKUP.ANY	Multi-socket cacheline Directory lookups (any state found)	0,1,2,3	na	0	0	0x00	PGMABLE
M2HBM	0x20	0x02	0x00	0x00	0x00000000	UNC_M2HBM_DIRECTORY_LOOKUP.STATE_I	Multi-socket cacheline Directory lookup (cacheline found in I state)	0,1,2,3	na	0	0	0x00	PGMABLE
M2HBM	0x20	0x04	0x00	0x00	0x00000000	UNC_M2HBM_DIRECTORY_LOOKUP.STATE_S	Multi-socket cacheline Directory lookup (cacheline found in S state)	0,1,2,3	na	0	0	0x00	PGMABLE
M2HBM	0x20	0x08	0x00	0x00	0x00000000	UNC_M2HBM_DIRECTORY_LOOKUP.STATE_A	Multi-socket cacheline Directory lookups (cacheline found in A state)	0,1,2,3	na	0	0	0x00	PGMABLE
M2HBM	0x21	0x01	0x00	0x00	0x00000003	UNC_M2HBM_DIRECTORY_UPDATE.ANY	Multi-socket cacheline Directory update from/to Any state	0,1,2,3	na	0	0	0x00	PGMABLE
M2HBM	0xc0	0x00	0x00	0x00	0x00800000	UNC_M2HBM_CMS_CLOCKTICKS	CMS Clockticks	0,1,2,3	na	0	0	0x00	PGMABLE
