# Performance Monitoring Events for Intel(R) Xeon(R) 6 Processor with P-cores - V1.03
# 08/19/2024 EVENT_STATUS Legend: None = 0x00, Deprecated = 0x01, Template = 0x02
# Copyright (c) 2001 - 2024 Intel Corporation. All rights reserved.
UNIT	CODE	UMASK	PORT_MASK	FC_MASK	UMASK_EXT	NAME	DESCRIPTION	COUNTER	FILTER	INTERNAL	FILTER_VALUE	EVENT_STATUS	COUNTER_TYPE
UPI LL	0x01	0x00	0x00	0x00	0x00000000	UNC_UPI_CLOCKTICKS	Number of UPI LL clock cycles while the event is enabled	0,1,2,3	na	0	0	0x00	PGMABLE
UPI LL	0x02	0x0F	0x00	0x00	0x00000000	UNC_UPI_TxL_FLITS.ALL_DATA	Valid Flits Sent : All Data : Counts number of data flits across this UPI link.	0,1,2,3	na	0	0	0x00	PGMABLE
UPI LL	0x02	0x27	0x00	0x00	0x00000000	UNC_UPI_TxL_FLITS.ALL_NULL	All Null Flits	0,1,2,3	na	0	0	0x00	PGMABLE
UPI LL	0x02	0x47	0x00	0x00	0x00000000	UNC_UPI_TxL_FLITS.IDLE	Valid Flits Sent : Idle : Shows legal flit time (hides impact of L0p and L0c).	0,1,2,3	na	0	0	0x00	PGMABLE
UPI LL	0x02	0x97	0x00	0x00	0x00000000	UNC_UPI_TxL_FLITS.NON_DATA	Valid Flits Sent : All Non Data : Shows legal flit time (hides impact of L0p and L0c).	0,1,2,3	na	0	0	0x00	PGMABLE
UPI LL	0x03	0x0F	0x00	0x00	0x00000000	UNC_UPI_RxL_FLITS.ALL_DATA	Valid Flits Received : All Data : Shows legal flit time (hides impact of L0p and L0c).	0,1,2,3	na	0	0	0x00	PGMABLE
UPI LL	0x03	0x97	0x00	0x00	0x00000000	UNC_UPI_RxL_FLITS.NON_DATA	Valid Flits Received : All Non Data : Shows legal flit time (hides impact of L0p and L0c).	0,1,2,3	na	0	0	0x00	PGMABLE
UPI LL	0x05	0x08	0x00	0x00	0x00000000	UNC_UPI_RxL_BASIC_HDR_MATCH.REQ	Matches on Receive path of a UPI Port : Request	0,1,2,3	na	0	0	0x00	PGMABLE
UPI LL	0x05	0x0D	0x00	0x00	0x00000000	UNC_UPI_RxL_BASIC_HDR_MATCH.WB	Matches on Receive path of a UPI Port : Writeback	0,1,2,3	na	0	0	0x00	PGMABLE
