# Performance Monitoring Events for 3rd Generation Intel(R) Xeon(R) Processor Scalable Family based on Ice Lake microarchitecture - V1.26
# 04/24/2024 EVENT_STATUS Legend: None = 0x00, Deprecated = 0x01, Template = 0x02
# Copyright (c) 2001 - 2024 Intel Corporation. All rights reserved.
UNIT	CODE	UMASK	PORT_MASK	FC_MASK	UMASK_EXT	NAME	DESCRIPTION	COUNTER	FILTER	INTERNAL	FILTER_VALUE	EVENT_STATUS	COUNTER_TYPE
M2M	0x00	0x00	0x00	0x00	0x00	UNC_M2M_CLOCKTICKS	Clockticks of the mesh to memory (M2M)	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x2C	0x01	0x00	0x00	0x00	UNC_M2M_TAG_HIT.NM_RD_HIT_CLEAN	Tag Hit : Clean NearMem Read Hit	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x2C	0x02	0x00	0x00	0x00	UNC_M2M_TAG_HIT.NM_RD_HIT_DIRTY	Tag Hit : Dirty NearMem Read Hit	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x2D	0x01	0x00	0x00	0x00	UNC_M2M_DIRECTORY_LOOKUP.ANY	Multi-socket cacheline Directory Lookups : Found in any state	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x2D	0x02	0x00	0x00	0x00	UNC_M2M_DIRECTORY_LOOKUP.STATE_I	Multi-socket cacheline Directory Lookups : Found in I state	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x2D	0x04	0x00	0x00	0x00	UNC_M2M_DIRECTORY_LOOKUP.STATE_S	Multi-socket cacheline Directory Lookups : Found in S state	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x2D	0x08	0x00	0x00	0x00	UNC_M2M_DIRECTORY_LOOKUP.STATE_A	Multi-socket cacheline Directory Lookups : Found in A state	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x2e	0x01	0x00	0x00	0x00	UNC_M2M_DIRECTORY_UPDATE.ANY	Multi-socket cacheline Directory Updates : From/to any state. Note: event counts are incorrect in 2LM mode.	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x37	0x20	0x00	0x00	0x07	UNC_M2M_IMC_READS.TO_PMM	M2M Reads Issued to iMC : PMM - All Channels	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x38	0x80	0x00	0x00	0x1C	UNC_M2M_IMC_WRITES.TO_PMM	M2M Writes Issued to iMC : PMM - All Channels	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0xc0	0x00	0x00	0x00	0x00	UNC_M2M_CMS_CLOCKTICKS	CMS Clockticks	0,1,2,3	na	0	0	0x00	PGMABLE
