# Performance Monitoring Events for 4th Generation Intel(R) Xeon(R) Processor Scalable Family based on Sapphire Rapids microarchitecture - V1.24
# 07/18/2024 EVENT_STATUS Legend: None = 0x00, Deprecated = 0x01, Template = 0x02
# Copyright (c) 2001 - 2024 Intel Corporation. All rights reserved.
UNIT	CODE	UMASK	PORT_MASK	FC_MASK	UMASK_EXT	NAME	DESCRIPTION	COUNTER	FILTER	INTERNAL	FILTER_VALUE	EVENT_STATUS	COUNTER_TYPE
CHA	0x01	0x00	0x00	0x00	0x00000000	UNC_CHA_CLOCKTICKS	CHA Clockticks	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c001ff	UNC_CHA_TOR_INSERTS.IA	TOR Inserts; All from Local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c001fd	UNC_CHA_TOR_INSERTS.IA_HIT	TOR Inserts; Hits from Local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c80ffd	UNC_CHA_TOR_INSERTS.IA_HIT_CRD	TOR Inserts; CRd hits from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c817fd	UNC_CHA_TOR_INSERTS.IA_HIT_DRD	TOR Inserts; DRd hits from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00ccc7fd	UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFRFO	TOR Inserts; LLCPrefRFO hits from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c807fd	UNC_CHA_TOR_INSERTS.IA_HIT_RFO	TOR Inserts; RFO hits from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c001fe	UNC_CHA_TOR_INSERTS.IA_MISS	TOR Inserts; misses from Local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c80ffe	UNC_CHA_TOR_INSERTS.IA_MISS_CRD	TOR Inserts for CRd misses from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c817fe	UNC_CHA_TOR_INSERTS.IA_MISS_DRD	TOR Inserts for DRd misses from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00ccc7fe	UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO	TOR Inserts; LLCPrefRFO misses from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c807fe	UNC_CHA_TOR_INSERTS.IA_MISS_RFO	TOR Inserts; RFO misses from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c88ffd	UNC_CHA_TOR_INSERTS.IA_HIT_CRD_PREF	TOR Inserts; CRd Pref hits from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c897fd	UNC_CHA_TOR_INSERTS.IA_HIT_DRD_PREF	TOR Inserts; DRd Pref hits from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c887fd	UNC_CHA_TOR_INSERTS.IA_HIT_RFO_PREF	TOR Inserts; RFO Pref hits from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c88ffe	UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF	TOR Inserts; CRd Pref misses from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c897fe	UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF	TOR Inserts for DRd Pref misses from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c887fe	UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF	TOR Inserts; RFO pref misses from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c887ff	UNC_CHA_TOR_INSERTS.IA_RFO_PREF	TOR Inserts; RFO pref from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c807ff	UNC_CHA_TOR_INSERTS.IA_RFO	TOR Inserts; RFO from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00ccc7ff	UNC_CHA_TOR_INSERTS.IA_LLCPREFRFO	TOR Inserts; LLCPrefRFO from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c817ff	UNC_CHA_TOR_INSERTS.IA_DRD	TOR Inserts; DRd from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c897ff	UNC_CHA_TOR_INSERTS.IA_DRD_PREF	TOR Inserts; DRd Pref from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c80fff	UNC_CHA_TOR_INSERTS.IA_CRD	TOR Inserts; CRd from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c816fe	UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL	TOR Inserts for DRd misses from local IA targeting local memory	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c8177e	UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE	TOR Inserts for DRd misses from local IA targeting remote memory	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00C896FE	UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL	TOR Inserts for DRd Pref misses from local IA targeting local memory	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00C8977E	UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE	TOR Inserts for DRd Pref misses from local IA targeting remote memory	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c806fe	UNC_CHA_TOR_INSERTS.IA_MISS_RFO_LOCAL	TOR Inserts RFO misses from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c8077e	UNC_CHA_TOR_INSERTS.IA_MISS_RFO_REMOTE	TOR Inserts; RFO misses from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c886fe	UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_LOCAL	TOR Inserts; RFO prefetch misses from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c8877e	UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_REMOTE	TOR Inserts; RFO prefetch misses from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c8c7ff	UNC_CHA_TOR_INSERTS.IA_CLFLUSH	TOR Inserts;CLFlush from Local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00cc57ff	UNC_CHA_TOR_INSERTS.IA_SPECITOM	TOR Inserts;SpecItoM from Local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c8178a	UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PMM	TOR Inserts for DRds issued by iA Cores targeting PMM Mem that Missed the LLC	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c81786	UNC_CHA_TOR_INSERTS.IA_MISS_DRD_DDR	TOR Inserts for DRds issued by IA Cores targeting DDR Mem that Missed the LLC	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00ccd7ff	UNC_CHA_TOR_INSERTS.IA_LLCPREFDATA	TOR Inserts; LLCPrefData from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00ccd7fe	UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA	TOR Inserts; LLCPrefData misses from local IA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c8168a	UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_PMM	TOR Inserts : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c8170a	UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_PMM	TOR Inserts : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c81686	UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_DDR	TOR Inserts : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x01	0x00	0x00	0x00c81706	UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_DDR	TOR Inserts : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00c001ff	UNC_CHA_TOR_INSERTS.IO	TOR Inserts; All from local IO	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00c001fd	UNC_CHA_TOR_INSERTS.IO_HIT	TOR Inserts; Hits from local IO	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00c001fe	UNC_CHA_TOR_INSERTS.IO_MISS	TOR Inserts; Misses from local IO	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00cc43fe	UNC_CHA_TOR_INSERTS.IO_MISS_ITOM	TOR Inserts : ItoM, indicating a full cacheline write request, from IO Devices that missed the LLC	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00c803fe	UNC_CHA_TOR_INSERTS.IO_MISS_RFO	TOR Inserts; RFO misses from local IO	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00cc43fd	UNC_CHA_TOR_INSERTS.IO_HIT_ITOM	TOR Inserts; ItoM hits from local IO	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00c803fd	UNC_CHA_TOR_INSERTS.IO_HIT_RFO	TOR Inserts; RFO hits from local IO	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00c803ff	UNC_CHA_TOR_INSERTS.IO_RFO	TOR Inserts; RFO from local IO	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00cc43ff	UNC_CHA_TOR_INSERTS.IO_ITOM	TOR Inserts for ItoM from local IO	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00cd43fd	UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR	TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices that hit the LLC	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00cd43fe	UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR	TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices that missed the LLC	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00c8f3fd	UNC_CHA_TOR_INSERTS.IO_HIT_PCIRDCUR	TOR Inserts; RdCur and FsRdCur hits from local IO	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00c8f3fe	UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR	TOR Inserts; RdCur and FsRdCur requests from local IO that miss LLC	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00c8f3ff	UNC_CHA_TOR_INSERTS.IO_PCIRDCUR	TOR Inserts for RdCur from local IO	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00cd43ff	UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR	TOR Inserts for ItoMCacheNears from IO devices.	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00CC23FF	UNC_CHA_TOR_INSERTS.IO_WBMTOI	TOR Inserts : WbMtoIs issued by IO Devices	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00C8C3FF	UNC_CHA_TOR_INSERTS.IO_CLFLUSH	TOR Inserts : CLFlushes issued by IO Devices	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00C8F2FF	UNC_CHA_TOR_INSERTS.IO_PCIRDCUR_LOCAL	PCIRDCUR (read) transactions from an IO device that addresses memory on a remote socket	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00C8F37F	UNC_CHA_TOR_INSERTS.IO_PCIRDCUR_REMOTE	PCIRDCUR (read) transactions from an IO device that addresses memory on the local socket	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00CC437F	UNC_CHA_TOR_INSERTS.IO_ITOM_REMOTE	ItoM (write) transactions from an IO device that addresses memory on a remote socket	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00CC42FF	UNC_CHA_TOR_INSERTS.IO_ITOM_LOCAL	ItoM (write) transactions from an IO device that addresses memory on the local socket	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00CD437F	UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR_REMOTE	ItoMCacheNear (partial write) transactions from an IO device that addresses memory on a remote socket	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x35	0x04	0x00	0x00	0x00CD42FF	UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR_LOCAL	ItoMCacheNear (partial write) transactions from an IO device that addresses memory on the local socket	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c001ff	UNC_CHA_TOR_OCCUPANCY.IA	TOR Occupancy; All from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c001fd	UNC_CHA_TOR_OCCUPANCY.IA_HIT	TOR Occupancy; Hits from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c80ffd	UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD	TOR Occupancy; CRd hits from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c817fd	UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD	TOR Occupancy; DRd hits from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00ccc7fd	UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFRFO	TOR Occupancy; LLCPrefRFO hits from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c807fd	UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO	TOR Occupancy; RFO hits from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c001fe	UNC_CHA_TOR_OCCUPANCY.IA_MISS	TOR Occupancy; Misses from Local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c80ffe	UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD	TOR Occupancy; CRd misses from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c817fe	UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD	TOR Occupancy for DRd misses from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00ccc7fe	UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFRFO	TOR Occupancy; LLCPrefRFO misses from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c807fe	UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO	TOR Occupancy; RFO misses from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c88ffd	UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD_PREF	TOR Occupancy; CRd Pref hits from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c897fd	UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_PREF	TOR Occupancy; DRd Pref hits from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c887fd	UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO_PREF	TOR Occupancy; RFO Pref hits from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c897fe	UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF	TOR Occupancy; DRd Pref misses from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c887fe	UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF	TOR Occupancy; RFO prefetch misses from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c807ff	UNC_CHA_TOR_OCCUPANCY.IA_RFO	TOR Occupancy; RFO from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c887ff	UNC_CHA_TOR_OCCUPANCY.IA_RFO_PREF	TOR Occupancy; RFO prefetch from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00ccc7ff	UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFRFO	TOR Occupancy; LLCPrefRFO from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c817ff	UNC_CHA_TOR_OCCUPANCY.IA_DRD	TOR Occupancy; DRd from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c80fff	UNC_CHA_TOR_OCCUPANCY.IA_CRD	TOR Occupancy; CRd from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c897ff	UNC_CHA_TOR_OCCUPANCY.IA_DRD_PREF	TOR Occupancy; DRd Pref from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c816fe	UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL	TOR Occupancy for DRd misses from local IA targeting local memory	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c8177e	UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE	TOR Occupancy for DRd misses from local IA targeting remote memory	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00C8977E	UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE	TOR Occupancy; DRd Pref misses from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c806fe	UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_LOCAL	TOR Occupancy; RFO misses from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c8077e	UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_REMOTE	TOR Occupancy; RFO misses from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c886fe	UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_LOCAL	TOR Occupancy; RFO prefetch misses from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c8877e	UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_REMOTE	TOR Occupancy; RFO prefetch misses from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c81786	UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_DDR	TOR Occupancy for DRds issued by iA Cores targeting DDR Mem that Missed the LLC	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c8178a	UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PMM	TOR Occupancy for DRds issued by iA Cores targeting PMM Mem that Missed the LLC	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00ccd7ff	UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFDATA	TOR Occupancy; LLCPrefData from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00ccd7fe	UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFDATA	TOR Occupancy; LLCPrefData misses from local IA	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c8168a	UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL_PMM	TOR Occupancy : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c8170a	UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE_PMM	TOR Occupancy : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c81686	UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL_DDR	TOR Occupancy : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c81706	UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE_DDR	TOR Occupancy : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00c8c7ff	UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSH	TOR Occupancy : CLFlushes issued by iA Cores	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x01	0x00	0x00	0x00cc57ff	UNC_CHA_TOR_OCCUPANCY.IA_SPECITOM	TOR Occupancy : SpecItoMs issued by iA Cores	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x04	0x00	0x00	0x00c001ff	UNC_CHA_TOR_OCCUPANCY.IO	TOR Occupancy; All from local IO	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x04	0x00	0x00	0x00c001fd	UNC_CHA_TOR_OCCUPANCY.IO_HIT	TOR Occupancy; Hits from local IO	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x04	0x00	0x00	0x00c001fe	UNC_CHA_TOR_OCCUPANCY.IO_MISS	TOR Occupancy; Misses from local IO	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x04	0x00	0x00	0x00cc43fe	UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOM	TOR Occupancy; ITOM misses from local IO	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x04	0x00	0x00	0x00cc43fd	UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOM	TOR Occupancy; ITOM hits from local IO	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x04	0x00	0x00	0x00cc43ff	UNC_CHA_TOR_OCCUPANCY.IO_ITOM	TOR Occupancy; ITOM from local IO	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x04	0x00	0x00	0x00c8f3fd	UNC_CHA_TOR_OCCUPANCY.IO_HIT_PCIRDCUR	TOR Occupancy; RdCur and FsRdCur hits from local IO	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x04	0x00	0x00	0x00c8f3fe	UNC_CHA_TOR_OCCUPANCY.IO_MISS_PCIRDCUR	TOR Occupancy; RdCur and FsRdCur misses from local IO	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x04	0x00	0x00	0x00c8f3ff	UNC_CHA_TOR_OCCUPANCY.IO_PCIRDCUR	TOR Occupancy; RdCur and FsRdCur from local IO	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x04	0x00	0x00	0x00cd43fd	UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOMCACHENEAR	TOR Occupancy : ItoMCacheNears, indicating a partial write request, from IO Devices that hit the LLC	0	na	0	0	0x00	PGMABLE
CHA	0x36	0x04	0x00	0x00	0x00cd43fe	UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOMCACHENEAR	TOR Occupancy : ItoMCacheNears, indicating a partial write request, from IO Devices that missed the LLC	0	na	0	0	0x00	PGMABLE
CHA	0x50	0x01	0x00	0x00	0x00000000	UNC_CHA_REQUESTS.READS_LOCAL	Read requests from a unit on this socket	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x50	0x02	0x00	0x00	0x00000000	UNC_CHA_REQUESTS.READS_REMOTE	Read requests from a remote socket	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x50	0x03	0x00	0x00	0x00000000	UNC_CHA_REQUESTS.READS	Read requests made into the CHA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x50	0x04	0x00	0x00	0x00000000	UNC_CHA_REQUESTS.WRITES_LOCAL	Write Requests from a unit on this socket	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x50	0x08	0x00	0x00	0x00000000	UNC_CHA_REQUESTS.WRITES_REMOTE	Read and Write Requests; Writes Remote	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x50	0x0c	0x00	0x00	0x00000000	UNC_CHA_REQUESTS.WRITES	Write requests made into the CHA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x50	0x10	0x00	0x00	0x00000000	UNC_CHA_REQUESTS.INVITOE_LOCAL	Local requests for exclusive ownership of a cache line  without receiving data	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x50	0x20	0x00	0x00	0x00000000	UNC_CHA_REQUESTS.INVITOE_REMOTE	Remote requests for exclusive ownership of a cache line  without receiving data	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x54	0x01	0x00	0x00	0x00000000	UNC_CHA_DIR_UPDATE.HA	Multi-socket cacheline Directory state updates; Directory Updated memory write from the HA pipe	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x54	0x02	0x00	0x00	0x00000000	UNC_CHA_DIR_UPDATE.TOR	Multi-socket cacheline Directory state updates; Directory Updated memory write from TOR pipe	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x59	0x01	0x00	0x00	0x00000000	UNC_CHA_IMC_READS_COUNT.NORMAL	Normal priority reads issued to the memory controller from the CHA	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0x5b	0x01	0x00	0x00	0x00000000	UNC_CHA_IMC_WRITES_COUNT.FULL	CHA to iMC Full Line Writes Issued; Full Line Non-ISOCH	0,1,2,3	na	0	0	0x00	PGMABLE
CHA	0xc0	0x00	0x00	0x00	0x00000000	UNC_CHA_CMS_CLOCKTICKS	CMS Clockticks	0,1,2,3	na	0	0	0x00	PGMABLE
