# Performance Monitoring Events for 4th Generation Intel(R) Xeon(R) Processor Scalable Family based on Sapphire Rapids microarchitecture - V1.24
# 07/18/2024 EVENT_STATUS Legend: None = 0x00, Deprecated = 0x01, Template = 0x02
# Copyright (c) 2001 - 2024 Intel Corporation. All rights reserved.
UNIT	CODE	UMASK	PORT_MASK	FC_MASK	UMASK_EXT	NAME	DESCRIPTION	COUNTER	FILTER	INTERNAL	FILTER_VALUE	EVENT_STATUS	COUNTER_TYPE
CXLDP	0x02	0x01	0x00	0x00	0x00000000	UNC_CXLDP_TxC_AGF_INSERTS.U2C_REQ	Number of Allocation to U2C Req AGF	0,1,2,3	na	0	0	0x00	PGMABLE
CXLDP	0x02	0x02	0x00	0x00	0x00000000	UNC_CXLDP_TxC_AGF_INSERTS.U2C_RSP0	Number of Allocation to U2C Rsp AGF 0	0,1,2,3	na	0	0	0x00	PGMABLE
CXLDP	0x02	0x04	0x00	0x00	0x00000000	UNC_CXLDP_TxC_AGF_INSERTS.U2C_RSP1	Number of Allocation to U2C Rsp AGF 1	0,1,2,3	na	0	0	0x00	PGMABLE
CXLDP	0x02	0x08	0x00	0x00	0x00000000	UNC_CXLDP_TxC_AGF_INSERTS.U2C_DATA	Number of Allocation to U2C Data AGF	0,1,2,3	na	0	0	0x00	PGMABLE
CXLDP	0x02	0x10	0x00	0x00	0x00000000	UNC_CXLDP_TxC_AGF_INSERTS.M2S_REQ	Number of Allocation to M2S Req AGF	0,1,2,3	na	0	0	0x00	PGMABLE
CXLDP	0x02	0x20	0x00	0x00	0x00000000	UNC_CXLDP_TxC_AGF_INSERTS.M2S_DATA	Number of Allocation to M2S Data AGF	0,1,2,3	na	0	0	0x00	PGMABLE
