# Performance Monitoring Events for 4th Generation Intel(R) Xeon(R) Processor Scalable Family based on Sapphire Rapids microarchitecture - V1.24
# 07/18/2024 EVENT_STATUS Legend: None = 0x00, Deprecated = 0x01, Template = 0x02
# Copyright (c) 2001 - 2024 Intel Corporation. All rights reserved.
UNIT	CODE	UMASK	PORT_MASK	FC_MASK	UMASK_EXT	NAME	DESCRIPTION	COUNTER	FILTER	INTERNAL	FILTER_VALUE	EVENT_STATUS	COUNTER_TYPE
M2M	0x01	0x00	0x00	0x00	0x00000000	UNC_M2M_CLOCKTICKS	M2M Clockticks	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x1F	0x01	0x00	0x00	0x00000000	UNC_M2M_TAG_HIT.NM_RD_HIT_CLEAN	Clean NearMem Read Hit	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x1F	0x02	0x00	0x00	0x00000000	UNC_M2M_TAG_HIT.NM_RD_HIT_DIRTY	Dirty NearMem Read Hit	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x20	0x01	0x00	0x00	0x00000000	UNC_M2M_DIRECTORY_LOOKUP.ANY	Multi-socket cacheline Directory lookups (any state found)	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x20	0x02	0x00	0x00	0x00000000	UNC_M2M_DIRECTORY_LOOKUP.STATE_I	Multi-socket cacheline Directory lookup (cacheline found in I state)	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x20	0x04	0x00	0x00	0x00000000	UNC_M2M_DIRECTORY_LOOKUP.STATE_S	Multi-socket cacheline Directory lookup (cacheline found in S state)	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x20	0x08	0x00	0x00	0x00000000	UNC_M2M_DIRECTORY_LOOKUP.STATE_A	Multi-socket cacheline Directory lookups (cacheline found in A state)	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x21	0x01	0x00	0x00	0x03	UNC_M2M_DIRECTORY_UPDATE.ANY	Multi-socket cacheline Directory update from/to Any state	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x24	0x20	0x00	0x00	0x00000003	UNC_M2M_IMC_READS.TO_PMM	UNC_M2M_IMC_READS.TO_PMM	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0x25	0x80	0x00	0x00	0x00000018	UNC_M2M_IMC_WRITES.TO_PMM	PMM - All Channels	0,1,2,3	na	0	0	0x00	PGMABLE
M2M	0xc0	0x00	0x00	0x00	0x800000	UNC_M2M_CMS_CLOCKTICKS	CMS Clockticks	0,1,2,3	na	0	0	0x00	PGMABLE
