# Performance Monitoring Events for 4th Generation Intel(R) Xeon(R) Processor Scalable Family based on Sapphire Rapids microarchitecture - V1.24
# 07/18/2024 EVENT_STATUS Legend: None = 0x00, Deprecated = 0x01, Template = 0x02
# Copyright (c) 2001 - 2024 Intel Corporation. All rights reserved.
UNIT	CODE	UMASK	PORT_MASK	FC_MASK	UMASK_EXT	NAME	DESCRIPTION	COUNTER	FILTER	INTERNAL	FILTER_VALUE	EVENT_STATUS	COUNTER_TYPE
UPI LL	0x01	0x00	0x00	0x00	0x00000000	UNC_UPI_CLOCKTICKS	UPI Clockticks	0,1,2,3	na	0	0	0x00	PGMABLE
UPI LL	0x02	0x0f	0x00	0x00	0x00000000	UNC_UPI_TxL_FLITS.ALL_DATA	Valid Flits Sent : All Data	0,1,2,3	na	0	0	0x00	PGMABLE
UPI LL	0x02	0x27	0x00	0x00	0x00000000	UNC_UPI_TxL_FLITS.ALL_NULL	All Null Flits	0,1,2,3	na	0	0	0x00	PGMABLE
UPI LL	0x02	0x97	0x00	0x00	0x00000000	UNC_UPI_TxL_FLITS.NON_DATA	Valid Flits Sent : All Non Data	0,1,2,3	na	0	0	0x00	PGMABLE
UPI LL	0x03	0x0f	0x00	0x00	0x00000000	UNC_UPI_RxL_FLITS.ALL_DATA	Valid Flits Received : All Data	0,1,2,3	na	0	0	0x00	PGMABLE
UPI LL	0x03	0x27	0x00	0x00	0x00000000	UNC_UPI_RxL_FLITS.ALL_NULL	Null FLITs received from any slot	0,1,2,3	na	0	0	0x00	PGMABLE
UPI LL	0x03	0x97	0x00	0x00	0x00000000	UNC_UPI_RxL_FLITS.NON_DATA	Valid Flits Received : All Non Data	0,1,2,3	na	0	0	0x00	PGMABLE
UPI LL	0x21	0x00	0x00	0x00	0x00000000	UNC_UPI_L1_POWER_CYCLES	Cycles in L1	0,1,2,3	na	0	0	0x00	PGMABLE
