# Performance Monitoring Events for Intel(R) Xeon(R) 6 Processor with E-cores - V1.05
# 08/14/2024 EVENT_STATUS Legend: None = 0x00, Deprecated = 0x01, Template = 0x02
# Copyright (c) 2001 - 2024 Intel Corporation. All rights reserved.
UNIT	CODE	UMASK	PORT_MASK	FC_MASK	UMASK_EXT	NAME	DESCRIPTION	COUNTER	FILTER	INTERNAL	FILTER_VALUE	EVENT_STATUS	COUNTER_TYPE
PCU	0x04	0x00	0x00	0x00	0x00000000	UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES	Thermal Strongest Upper Limit Cycles	0,1,2,3	na	0	0	0x00	PGMABLE
PCU	0x05	0x00	0x00	0x00	0x00000000	UNC_P_FREQ_MAX_POWER_CYCLES	Power Strongest Upper Limit Cycles	0,1,2,3	na	0	0	0x00	PGMABLE
PCU	0x09	0x00	0x00	0x00	0x00000000	UNC_P_PROCHOT_INTERNAL_CYCLES	Internal Prochot	0,1,2,3	na	0	0	0x00	PGMABLE
PCU	0x0a	0x00	0x00	0x00	0x00000000	UNC_P_PROCHOT_EXTERNAL_CYCLES	External Prochot	0,1,2,3	na	0	0	0x00	PGMABLE
PCU	0x2b	0x00	0x00	0x00	0x00000000	UNC_P_PKG_RESIDENCY_C2E_CYCLES	Package C State Residency - C2E	0,1,2,3	na	0	0	0x00	PGMABLE
PCU	0x2d	0x00	0x00	0x00	0x00000000	UNC_P_PKG_RESIDENCY_C6_CYCLES	Package C State Residency - C6	0,1,2,3	na	0	0	0x00	PGMABLE
PCU	0x35	0x00	0x00	0x00	0x00000000	UNC_P_POWER_STATE_OCCUPANCY_CORES_C0	Number of cores in C0	0,1,2,3	na	0	0	0x00	PGMABLE
PCU	0x36	0x00	0x00	0x00	0x00000000	UNC_P_POWER_STATE_OCCUPANCY_CORES_C3	Number of cores in C3	0,1,2,3	na	0	0	0x00	PGMABLE
PCU	0x37	0x00	0x00	0x00	0x00000000	UNC_P_POWER_STATE_OCCUPANCY_CORES_C6	Number of cores in C6	0,1,2,3	na	0	0	0x00	PGMABLE
PCU	0x74	0x00	0x00	0x00	0x00000000	UNC_P_FREQ_TRANS_CYCLES	Cycles spent changing Frequency	0,1,2,3	na	0	0	0x00	PGMABLE
