# Performance Monitoring Events for Intel Atom(R) Processors based on SnowRidge microarchitecture - V1.23
# 04/24/2024 EVENT_STATUS Legend: None = 0x00, Deprecated = 0x01, Template = 0x02
# Copyright (c) 2001 - 2024 Intel Corporation. All rights reserved.
UNIT	CODE	UMASK	PORT_MASK	FC_MASK	UMASK_EXT	NAME	DESCRIPTION	COUNTER	FILTER	INTERNAL	FILTER_VALUE	EVENT_STATUS	COUNTER_TYPE
iMC	0x00	0x00	0x00	0x00	0x00	UNC_M_CLOCKTICKS	DRAM Clockticks	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x00	0x00	0x00	0x00	0x00	UNC_M_HCLOCKTICKS	Half clockticks for IMC	FIXED	na	0	0	0x00	FIXED
iMC	0x01	0x0B	0x00	0x00	0x00	UNC_M_ACT_COUNT.ALL	DRAM Activate Count : All Activates	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x02	0x04	0x00	0x00	0x00	UNC_M_PRE_COUNT.RD	DRAM Precharge commands. : Precharge due to read	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x02	0x08	0x00	0x00	0x00	UNC_M_PRE_COUNT.WR	DRAM Precharge commands. : Precharge due to write	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x02	0x10	0x00	0x00	0x00	UNC_M_PRE_COUNT.PGT	DRAM Precharge commands. : Precharge due to page table	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x02	0x1C	0x00	0x00	0x00	UNC_M_PRE_COUNT.ALL	DRAM Precharge commands.	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x04	0x0f	0x00	0x00	0x00	UNC_M_CAS_COUNT.RD	All DRAM read CAS commands issued (including underfills)	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x04	0x30	0x00	0x00	0x00	UNC_M_CAS_COUNT.WR	All DRAM write CAS commands issued	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x04	0x3f	0x00	0x00	0x00	UNC_M_CAS_COUNT.ALL	All DRAM CAS commands issued	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x10	0x01	0x00	0x00	0x00	UNC_M_RPQ_INSERTS.PCH0	Read Pending Queue Allocations	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x10	0x02	0x00	0x00	0x00	UNC_M_RPQ_INSERTS.PCH1	Read Pending Queue Allocations	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x20	0x01	0x00	0x00	0x00	UNC_M_WPQ_INSERTS.PCH0	Write Pending Queue Allocations	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x20	0x02	0x00	0x00	0x00	UNC_M_WPQ_INSERTS.PCH1	Write Pending Queue Allocations	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x45	0x01	0x00	0x00	0x00	UNC_M_DRAM_REFRESH.OPPORTUNISTIC	Number of DRAM Refreshes Issued	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x45	0x02	0x00	0x00	0x00	UNC_M_DRAM_REFRESH.PANIC	Number of DRAM Refreshes Issued	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x45	0x04	0x00	0x00	0x00	UNC_M_DRAM_REFRESH.HIGH	Number of DRAM Refreshes Issued	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x80	0x00	0x00	0x00	0x00	UNC_M_RPQ_OCCUPANCY_PCH0	Read Pending Queue Occupancy	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x81	0x00	0x00	0x00	0x00	UNC_M_RPQ_OCCUPANCY_PCH1	Read Pending Queue Occupancy	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x82	0x00	0x00	0x00	0x00	UNC_M_WPQ_OCCUPANCY_PCH0	Write Pending Queue Occupancy	0,1,2,3	na	0	0	0x00	PGMABLE
iMC	0x83	0x00	0x00	0x00	0x00	UNC_M_WPQ_OCCUPANCY_PCH1	Write Pending Queue Occupancy	0,1,2,3	na	0	0	0x00	PGMABLE
