##########################################################################
# SEP Uncore Event File: UNC_SOC_All_Reqs.txt
# Copyright(c)2007-2016 Intel Corporation. All rights reserved.
# File: PUBLIC
# Events: PUBLIC
# Created: Wed Aug 20 11:58:03 2014
# Target: TNG-B0
# Revision: 2.0-3.1.3.0
##########################################################################

# EVENT INFORMATION

# GROUP_ID         : 75041
# GROUP_NAME       : UNC_SOC_All_Reqs
# GROUP_DESC       : Counts the number of requests per memory agent. Counts can be used to identify high demand agents or to estimate bandwidth for an agent by multiplying each request by 64 bytes.
# EVENT_ID         : 74771
# EVENT_NAME       : Mod0_Reqs
# EVENT_DESC       : Counts the number of requests from Silvermont module 0.
# EVENT_COUNTER    : 0
# EVENT_ID         : 74711
# EVENT_NAME       : Disp_Reqs
# EVENT_DESC       : Counts the number of requests from the display controller.
# EVENT_COUNTER    : 1
# EVENT_ID         : 74721
# EVENT_NAME       : GFX_Reqs
# EVENT_DESC       : Counts the number of requests from the graphics controller.
# EVENT_COUNTER    : 2
# EVENT_ID         : 74731
# EVENT_NAME       : Imaging_Reqs
# EVENT_DESC       : Counts the number of requests from the imaging controller.
# EVENT_COUNTER    : 3
# EVENT_ID         : 75201
# EVENT_NAME       : LowSpeedPF_Reqs
# EVENT_DESC       : Counts the aggregate number of requests from the low speed peripheral fabric.
# EVENT_COUNTER    : 4
# CLOCK_COUNTER    : 5

# All SOC Programing
# HEADER	CFGTYPE	BUS_NUMBER	DEVICE_NUMBER	FUNC_NUMBER	REG_SIZE	OPERATION	BARNAME	OFFSET	VALUE	MASK	PORT_ID	OP_CODE
#<CFGTYPE-MMIO/PCICFG>	<BUS_NUMBER>	<DEVICE_NUMBER>	<FUNC_NUMBER>	<REGISTER_SIZE>	<READ/WRITE/RMW operation>	<BARNAME>	<OFFSET>	<VALUE>	<MASK>	<PORT_ID>	<OP_CODE>

# SOC CONFIGURATION

CFG	0	0	0	32	WRITE	SOCPCI	0x00000904	0x00000001	0xFFFFFFFF	26	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000900	0x00000001	0xFFFFFFFF	26	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000928	0x00C00800	0xFFFFFFFF	26	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000092C	0x01801404	0xFFFFFFFF	26	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000930	0x00000007	0xFFFFFFFF	26	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000B804	0x00000001	0xFFFFFFFF	26	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000B800	0x00000001	0xFFFFFFFF	26	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00009904	0x00000A0B	0xFFFFFFFF	26	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00009900	0x00000001	0xFFFFFFFF	26	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00009884	0x00000001	0xFFFFFFFF	26	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00009880	0x00000001	0xFFFFFFFF	26	1
# COUNTER CONFIGURATION

CFG	0	0	0	32	WRITE	SOCPCI	0x00000000	0x00008000	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000008	0x008FFF00	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000000C	0x00000003	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000030	0x10000000	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000040	0x10000000	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000050	0x10000000	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000060	0x10000000	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000070	0x10000000	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000080	0x00000000	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000002C	0x00000100	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000003C	0x00000101	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000004C	0x00000102	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000005C	0x00000103	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000006C	0x00000120	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x0000007C	0x00002121	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000034	0x00000000	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000044	0x00000000	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000054	0x00000000	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000064	0x00000000	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000074	0x00000000	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000084	0x00000000	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000028	0x02010100	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000038	0x02110101	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000048	0x02110102	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000058	0x02110103	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000068	0x02110120	0xFFFFFFFF	25	1
CFG	0	0	0	32	WRITE	SOCPCI	0x00000078	0x00110000	0xFFFFFFFF	25	1
